YAAAAAAAAAAAARRRRRRRRRRRGGGGGGGGGHHHHHHHHHHHHHHHHH H! *head spontaneously combusts*
<div align="center">![]()
Achtung: here lies the most complex of all known wire contraptions. By logical complexity it actually might exceed WireOS 4...</div>
<div align="center">![]()
Warning: Please note the PANIC button in your browser, it's in top-right, labeled "X". Press it if your brains start to fry</div>
So um, i81 is a processor. It executes machine code, and works with numbers/data, just like the regular processors. Well, it's far simplier than ZCPU for example! ^_^
Why is it special? This processor is done only in pure wire, i.e. without using all cool functions, like expression gate, or ZCPU. Even more - it uses only 1 timer, rest of gates/chips are logic, ariphmetic, comparsion, and selection chips. Right now only the CPU base uses ~110 chips (i80 was using 130). This is a 4th generation wired processor, following unreleased PHX4004 (which never got really completed much, screenshots pending), and PHX1960 processor (http://www.wiremod.com/showthread.php?t=3117).
Screenshot of i81 processor (it's old screenshot, some new stuff was added)
Stats: ~105 gates (without opcodes)
Screenshot of old i80 processor (for comparsion)
Stats: ~130 gates (without opcodes)
(It's still WIP as you see!)
Screenshot of 3rd generation (PHX4004/i40) processor
<---pending--->
Stats: ~35 gates (only timing system)
Screenshot of 2th generation (PHX1960) processor (i10)
Stats: ~40 gates
(Holy crap, that was messy!)
Terms (you need to learn these before you proceed):
Opcode - elementary operation. For example addition of 2 values. Each opcode is written by a mnemonic (short notation), and has 2 parameters. Operation is executed on 1st and 2nd parameters, but result is written into parameter 1.
Operation - one of possible combinations of opcode, and parameters.
Cycle - one execution of operation. This is done from 1 to 4 times a second (set using special clock rate chip).
Microcycle - 1/4th of the cycle. Executed 4 to 16 times a second. Each microcycle does some important CPU task, like fetching values from memory.
Subcycle - 1/8th of cycle. Executed from 8 to 32 times a second. Used to synchronize some events. Can be replaced with latched subcycle triggers - basicly a set-reset latch, which is set when microcycle is toggled, and reset by itself...
Features:Command execution:
- 12 opcodes. Possible extension to 16 opcodes without severe design changes.
- 108 operations (9 combinations for each opcode)
- 8 I/O ports (4 in, 4 out)
- 4 available registers. Can be extended to 8 (design supports it, it's just the extra wiring).
Each second there are 1 to 4 cycles executed (it's set in scheme #01, timing one).
Each cycle has 4 microcycles:
On microcycle #0 opcode is read from RAM.
On microcycle #1 parameter 1 is read from RAM.
On microcycle #2 parameter 2 is read from RAM.
Last microcycle, #3, executes and writes back the result of a command specified by previously read parameters.
Subcycles synchronize writes, back to registers, memory, etc, and increment of IP (instruction pointer)
Opcodes:Full saves are not available due to WIP-ness. If asked, I will post WIP saves, and saves of older CPU's.
- ADD - Add 2 values
- SUB - Subtract 2 values
- MUL - Multiply 2 values
- DIV - Divide 2 values
- CMP - Compare 2 values. Result is written to compare register
- JMP - Jump in code
- CJMP - Conditional jump conditional code jump
- NOP - No operation, do nothing
- LD - Load constant into register/memory
- MOV - Move values between registers
YAAAAAAAAAAAARRRRRRRRRRRGGGGGGGGGHHHHHHHHHHHHHHHHH H! *head spontaneously combusts*
Can this device be used to calculate ballistic trajectory?
YesCan this device be used to calculate ballistic trajectory?[/b]h34r:
You have way to much spare time... /JOKE
anyway nice done, not a thing I will be able to build...
Denmark is the most beer drinking country in Europe....
And I live on the most beer drinking island in Denmark
Bookmarks